SoC Power Design Engineer

Company: Qualcomm
Location: San Diego
Posted on: March 3, 2025

Job Description:

Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.Qualcomm's Global SoC Power team is currently seeking candidates whose primary role is to implement and validate low power design intent requirements at the SoC-level. The role also expands to power analysis and projection of SoC Use Case power. The candidate will work with frontend RTL, DFT, Synthesis, Design Verification and Physical Design teams during the SoC development. Also, the candidate will have the opportunity to work with IP designers, power target (Chipset/SW) teams, and Post-Silicon test teams to jointly ensure power intent design requirements and power projections are fully validated.QUALIFICATIONS:

• Bachelor's degree in Electrical or Computer Engineering plus:
• ASIC frontend development
• Logic design, RTL coding, verification, synthesis, and timing closure
• Hardware description languages (Verilog, VHDL, System Verilog)
• Power-aware implementation flow, including UPF/CPF/Conformal Low Power Check
• Scripting - Perl/Tcl/PythonPREFERRED QUALIFICATIONS:
  • Master's degree in Electrical or Computer EngineeringExperience with/in:
    • Familiarity of overall SoC Infrastructure - DDR, Busses, CPUs, I/Os and DFT Components
    • Familiarity of power islands, power gating, power sequencing and multi-voltage domain design
    • Power analysis familiarity in areas of clocktree, peak power, TDP, limits managementResponsibilities/Duties:
      • Work with frontend RTL, DFT, Synthesis, and Physical design teams in the development of power intent design at SoC level
      • Generate and validate power intent design (UPF) at SoC level
      • Review designs and guide IP designers' power intent design ensuring it meets SoC level low power implementation requirements
      • Work with design verification in validating low power design features at SoC and IP level.
      • Collaborate with company CAD and vendor to enhance existing power flows and tools
      • Improve power design flows in areas of power modeling, clock power analysis, structural power validation, IP power intent QA
      • Execute power-aware implementation flow, including UPF/CPF/Conformal Low Power Check
      • Review IP design's power features and power budgets/estimates
      • Track IP power development through the design cycle ensuring it meets power budgets - leakage/dynamic at every milestone
      • Perform power analysis/projection of SoC baseline power and deliver SoC power models to chipset
      • Execute power simulation/analysis tool (PtPx/PowerArtist)Minimum Qualifications:Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.ORMaster's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.ORPhD in Science, Engineering, or related field.Pay range and Other Compensation & Benefits:$115,600.00 - $173,400.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.
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Keywords: Qualcomm, San Diego , SoC Power Design Engineer, Engineering , San Diego, California